Designers Corner with Prof. Mike Smith  Part 1

Researching and planning the design

Now I turned to looking at IP sources to plan the rest of the design. Xilinx has a group that manages IP and I turned to them for advice. They supply almost all of the IP for Xilinx customers from outside sources, third-party vendors. There were copies of both 8051 and ARC microprocessor cores inside Xilinx, but both were for evaluation in specific projects and it was unlikely we could use these. It occurred to me that we might be able to use the Sun picoJava processor that we were using for the “Libraries of the Future” project. Putting aside the processor for the moment, I found a company, CoreEl Microsystems (http://www.coreel.com) that produced a 10/100 MAC core for Xilinx FPGAs including a development platform/evaluation board. Xilinx gave me the name of the person to contact at CoreEl: Chetan Sanghvi, the CEO. I did what I normally do at this point: mailed him a copy of my book and sent an email. Sometimes it works. I got email back from Chetan explaining that CoreEl had an obligation not sell their Ethernet MAC core below a certain price (which was more than we thought we could afford). My guess was that CoreEl had designed the MAC for a customer, had licensed it back from them, and was required not to sell the core at a price that would undercut their original customer. In retrospect, given the amount of work we were later to spend developing an equivalent function, we should have bought the core. At this point I was still doing paper design, and was stuck.

During these first few weeks at Xilinx I would stop by for a morning or afternoon. Steve would drop in to see me, sometimes to talk about “Chips on the Net”, sometimes to talk about his encryption projects. Steve’s suggestion was to start somewhere, anywhere: “Err on the side of activity!” By this time Hamish was ready to use the work from his project and apply it to “Chips on the Net.” At was at this point Hamish and I both came together because we had both been thinking independently about the same things. I thought this was a special occurrence and was to explain why we did what we did, and form our motivation. Hamish had arranged for an intern from UC Santa Cruz to work with him for the summer, and this would increase our resources. Since a motivated Xilinx engineer was now directly involved, we were free to spend some Xilinx money and resources! Hamish, with his considerable experience in the area of FPGAs and TCP/IP, was to become the key engineer on the project.

Around this time Dave Van den Bout at XESS (http://www.xess.com/) had started the design of a board using an Ethernet PHY chip from Level One (now part of Intel), the LXT970A. We did some research and found that Level One sold evaluation boards for the LXT970A and some good application notes and reference designs.

Table of contents   Previous   Next